{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II " "Info: Running Quartus II TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 10.1 Build 197 01/19/2011 Service Pack 1 SJ Web Edition " "Info: Version 10.1 Build 197 01/19/2011 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jun 17 21:14:19 2011 " "Info: Processing started: Fri Jun 17 21:14:19 2011" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta DE2_115_ADDA -c DE2_115_ADDA " "Info: Command: quartus_sta DE2_115_ADDA -c DE2_115_ADDA" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: qsta_default_script.tcl version: #4" {  } {  } 0 0 "qsta_default_script.tcl version: #4" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Core supply voltage 1.2V " "Info: Core supply voltage is 1.2V" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_SDC_STATEMENT_PARENT" "" "Info: Evaluating HDL-embedded SDC commands" { { "Info" "ISTA_SDC_STATEMENT_ENTITY" "MDCK2395 " "Info: Entity MDCK2395" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical LJMV0916_0\] " "Info: set_disable_timing \[get_cells -hierarchical LJMV0916_0\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_0\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_0\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_1\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_1\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_2\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_2\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_3\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_3\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_4\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_4\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_5\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_5\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_6\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_6\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical EPEO2888_7\] " "Info: set_disable_timing \[get_cells -hierarchical EPEO2888_7\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_disable_timing \[get_cells -hierarchical WCRO7487_0\] " "Info: set_disable_timing \[get_cells -hierarchical WCRO7487_0\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Entity %1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_ENTITY" "pzdyqx_impl " "Info: Entity pzdyqx_impl" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_false_path -from \[get_keepers \{altera_reserved_tdi\}\] -to \[get_keepers \{pzdyqx*\}\] " "Info: set_false_path -from \[get_keepers \{altera_reserved_tdi\}\] -to \[get_keepers \{pzdyqx*\}\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Entity %1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_ENTITY" "sld_hub " "Info: Entity sld_hub" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "create_clock -period 10MHz -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\] " "Info: create_clock -period 10MHz -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_clock_groups -asynchronous -group \{altera_reserved_tck\} " "Info: set_clock_groups -asynchronous -group \{altera_reserved_tck\}" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Entity %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Evaluating HDL-embedded SDC commands" 0 0 "" 0 -1}
{ "Info" "ISTA_SDC_FOUND" "DE2_115_ADDA.SDC " "Info: Reading SDC File: 'DE2_115_ADDA.SDC'" {  } {  } 0 0 "Reading SDC File: '%1!s!'" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL Clocks " "Info: Deriving PLL Clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{U1\|pll_100\|altpll_component\|pll\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -duty_cycle 50.00 -name \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\} \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\} " "Info: create_generated_clock -source \{U1\|pll_100\|altpll_component\|pll\|inclk\[0\]\} -divide_by 2 -multiply_by 5 -duty_cycle 50.00 -name \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\} \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{U1\|pll_100\|altpll_component\|pll\|inclk\[0\]\} -divide_by 4 -multiply_by 5 -duty_cycle 50.00 -name \{U1\|pll_100\|altpll_component\|pll\|clk\[1\]\} \{U1\|pll_100\|altpll_component\|pll\|clk\[1\]\} " "Info: create_generated_clock -source \{U1\|pll_100\|altpll_component\|pll\|inclk\[0\]\} -divide_by 4 -multiply_by 5 -duty_cycle 50.00 -name \{U1\|pll_100\|altpll_component\|pll\|clk\[1\]\} \{U1\|pll_100\|altpll_component\|pll\|clk\[1\]\}" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_CALL_IS_DELAYED" "" "Info: Clock uncertainty calculation is delayed until the next update_timing_netlist call" {  } {  } 0 0 "Clock uncertainty calculation is delayed until the next update_timing_netlist call" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 1200mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 2.652 " "Info: Worst-case setup slack is 2.652" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    2.652         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     2.652         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   43.900         0.000 altera_reserved_tck  " "Info:    43.900         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.393 " "Info: Worst-case hold slack is 0.393" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.393         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     0.393         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.441         0.000 altera_reserved_tck  " "Info:     0.441         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 43.466 " "Info: Worst-case recovery slack is 43.466" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   43.466         0.000 altera_reserved_tck  " "Info:    43.466         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal -2.424 " "Info: Worst-case removal slack is -2.424" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.424        -2.424 altera_reserved_tck  " "Info:    -2.424        -2.424 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 3.000 " "Info: Worst-case minimum pulse width slack is 3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.000         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     3.000         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    9.891         0.000 CLOCK_50  " "Info:     9.891         0.000 CLOCK_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK2_50  " "Info:    16.000         0.000 CLOCK2_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK3_50  " "Info:    16.000         0.000 CLOCK3_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   29.350         0.000 altera_reserved_tck  " "Info:    29.350         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 1200mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 3.055 " "Info: Worst-case setup slack is 3.055" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.055         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     3.055         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   44.084         0.000 altera_reserved_tck  " "Info:    44.084         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.228 " "Info: Worst-case hold slack is 0.228" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.228         0.000 altera_reserved_tck  " "Info:     0.228         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.379         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     0.379         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 43.850 " "Info: Worst-case recovery slack is 43.850" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   43.850         0.000 altera_reserved_tck  " "Info:    43.850         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal -2.375 " "Info: Worst-case removal slack is -2.375" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.375        -2.375 altera_reserved_tck  " "Info:    -2.375        -2.375 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 3.000 " "Info: Worst-case minimum pulse width slack is 3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.000         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     3.000         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    9.882         0.000 CLOCK_50  " "Info:     9.882         0.000 CLOCK_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK2_50  " "Info:    16.000         0.000 CLOCK2_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK3_50  " "Info:    16.000         0.000 CLOCK3_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   29.775         0.000 altera_reserved_tck  " "Info:    29.775         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Fast 1200mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -rise_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -fall_to \[get_clocks \{U1\|pll_100\|altpll_component\|pll\|clk\[0\]\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 5.539 " "Info: Worst-case setup slack is 5.539" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    5.539         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     5.539         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   47.627         0.000 altera_reserved_tck  " "Info:    47.627         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.130 " "Info: Worst-case hold slack is 0.130" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.130         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     0.130         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.181         0.000 altera_reserved_tck  " "Info:     0.181         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 46.617 " "Info: Worst-case recovery slack is 46.617" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   46.617         0.000 altera_reserved_tck  " "Info:    46.617         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal -0.992 " "Info: Worst-case removal slack is -0.992" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -0.992        -0.992 altera_reserved_tck  " "Info:    -0.992        -0.992 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 3.753 " "Info: Worst-case minimum pulse width slack is 3.753" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.753         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\]  " "Info:     3.753         0.000 U1\|pll_100\|altpll_component\|pll\|clk\[0\] " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    9.400         0.000 CLOCK_50  " "Info:     9.400         0.000 CLOCK_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK2_50  " "Info:    16.000         0.000 CLOCK2_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   16.000         0.000 CLOCK3_50  " "Info:    16.000         0.000 CLOCK3_50 " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   29.420         0.000 altera_reserved_tck  " "Info:    29.420         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Info: Design is not fully constrained for setup requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 -1}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Info: Design is not fully constrained for hold requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 3 s Quartus II " "Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "310 " "Info: Peak virtual memory: 310 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Fri Jun 17 21:14:41 2011 " "Info: Processing ended: Fri Jun 17 21:14:41 2011" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:22 " "Info: Elapsed time: 00:00:22" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:19 " "Info: Total CPU time (on all processors): 00:00:19" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
